Semiconductor Stocks and the AI Wave: Separating Signal from Hype

NVIDIA's run has made everyone a semiconductor analyst, which means the easy money has probably already been made. The stock went from interesting to consensus, and consensus trades are rarely where you generate alpha. The more interesting questions right now are about what comes next: custom silicon from hyperscalers, the inference versus training shift, and the memory bottleneck that most investors aren't paying enough attention to.

Semiconductors are the most important industrial sector of the next decade. Most investors don't understand them well enough to size positions confidently. That's worth fixing. Let's walk through the full picture.

The Semiconductor Value Chain: Four Distinct Businesses

"Chipmaker" describes four structurally different businesses, each with different margins, capital intensity, and competitive dynamics. Treating them as interchangeable is how you end up with a confused portfolio.

• Fabless design companies (NVIDIA, AMD, Qualcomm, Broadcom) design chips and outsource manufacturing. Asset-light, high gross margins (50-70%), but entirely dependent on foundries for production capacity. The intellectual property is in the architecture. The competitive moat is in design talent and software ecosystem.
• Integrated Device Manufacturers (IDMs) (Intel, Samsung, Texas Instruments) both design and manufacture chips. High capital intensity, cyclically variable margins, but control over manufacturing timelines and yields. Intel's struggle to hold process leadership while funding fabs out of a shrinking earnings base, to the point where it cut 2025 gross capex to roughly $18 billion and ended up selling the US government a stake in itself, is the defining case study of the IDM model's challenges.
• Pure-play foundries (TSMC, GlobalFoundries, SMIC) manufacture chips for fabless customers. Enormous capital intensity (TSMC spent $40.9B in 2025 and has guided to $52-56B for 2026), but relatively stable demand over cycles because they serve all fabless customers. TSMC earns 50%+ gross margins at leading-edge nodes where it has no peer.
• EDA, IP, and materials companies (Synopsys, Cadence, ASML, Applied Materials) provide the design tools, photolithography equipment, and process materials that the entire supply chain runs on. ASML's EUV monopoly is arguably the highest-quality business model in the sector: one supplier for the equipment that enables every advanced chip in the world.

NVIDIA's Moat: What It Is and What Threatens It

NVIDIA's competitive position is frequently described as "GPU dominance," but that understates the actual source of the moat, which is CUDA. The CUDA programming model and its associated libraries (cuDNN, NCCL, Thrust), framework integrations (PyTorch, TensorFlow), and developer tooling have been accumulating since 2007. Every major AI research lab, every hyperscaler ML platform, and virtually every production AI system has been built on CUDA primitives. The switching cost isn't the hardware. It's the accumulated codebase, the retraining of engineers, and the loss of CUDA-specific optimizations.

The realistic threats to NVIDIA's position are not from AMD ROCm or Intel oneAPI in the near term. Despite genuine technical progress, software adoption lags hardware performance improvements by 3-5 years. The credible threat vectors are:

• Custom silicon from hyperscalers: Google's TPU line, Amazon Trainium and Inferentia, Microsoft Maia, and Meta's MTIA are purpose-built accelerators that sidestep NVIDIA's economics for specific workloads. These chips won't be sold externally, but they shave NVIDIA's addressable market as hyperscalers move a slice of training and inference off NVIDIA clusters.
• Inference market economics: training is a small fraction of total GPU-hours. Inference at production scale is the much larger market. Inference workloads are more amenable to custom silicon because the model weights are fixed and the computation graph is predictable. A top-end training GPU is over-provisioned for many inference tasks, and that gap is what AMD, Groq, and Cerebras are aiming at.
• Export control escalation: the China market, already restricted, remains a policy football. China was a meaningful slice of NVIDIA's data center revenue before restrictions and is now a rounding error. That cuts both ways: further tightening costs little, and any loosening is upside nobody is modeling.

NVIDIA's moat is real and durable. But whatever multiple you are paying today embeds years of dominance across both training and inference, and those are not the same market. Inference will be the more competitive one, and inference is where AI compute demand compounds hardest over the next decade. That is the assumption to interrogate, not the GPU benchmarks.

The TSMC Bottleneck and Geopolitical Risk

TSMC manufactures approximately 90% of the world's most advanced logic chips (below 5nm) and 60%+ of total advanced logic capacity. This concentration creates a systemic dependency that geopolitical risk has made impossible to ignore. The Taiwan Strait scenario, ranging from economic coercion to military blockade, is no longer a tail risk that sophisticated investors can dismiss. Nobody has a credible probability for it, and I'd distrust anyone who quotes you one to the decimal. What you can say is that the economic consequences of a TSMC disruption would dwarf the COVID supply chain crisis, and that an unquantifiable risk with a catastrophic payoff is exactly the kind you size for rather than model.

TSMC's geographic diversification strategy (Arizona fabs for N4 and N2, Japan fab for N12, Germany fab for automotive-grade nodes) is moving faster than originally planned, driven by customer pressure and government incentives. But the Arizona fabs are operating at higher cost than Taiwan operations. TSMC management has acknowledged 20%+ manufacturing cost premiums for US production. The global chip supply is getting more geographically diverse. It's not getting cheaper.

Investors holding TSMC (TSM) are explicitly accepting geopolitical concentration risk in exchange for exposure to the best secular growth story in technology infrastructure. The correct framework is position sizing, not avoidance: TSM at 5% of a technology portfolio is different from TSM at 25%.

Memory Markets: HBM, DRAM, and NAND Cycles

Memory semiconductors (DRAM, NAND flash) are the most cyclical segment of the semiconductor market, and the AI wave has introduced a new memory tier, High Bandwidth Memory (HBM), that has dramatically changed the economics for Samsung, SK Hynix, and Micron. HBM is more constrained than the market appreciates, and that matters.

HBM is 3D-stacked DRAM that sits directly on the GPU package via through-silicon vias, providing several times the memory bandwidth of conventional DRAM at a much higher average selling price. An H100 carries 80 GB of HBM3; the H200 pushed that to 141 GB of faster HBM3e, and the pattern of every generation demanding more and better memory has held since. SK Hynix supplies roughly half of all HBM capacity and earns a large ASP premium per gigabyte over commodity DRAM, which has structurally improved its revenue mix and margins.

Here is the part that has genuinely flipped since 2023, and I don't think most investors have updated. Memory is no longer a glut. It's a shortage. HBM eats disproportionate wafer capacity, and Samsung, SK Hynix, and Micron have all pivoted their cleanrooms toward it, which starved conventional DRAM and NAND. Contract prices surged through the first half of 2026, and the memory makers are warning the squeeze runs into 2027. The old script, where NAND is a permanent drag on Micron's margins, is out of date. The new risk is the reverse: memory is now earning cycle-peak economics, and cycle peaks in memory have never lasted.

The AI Accelerator Market: Training vs Inference

The AI accelerator market isn't monolithic. Training and inference have fundamentally different compute requirements, which drives fundamentally different competitive dynamics. The distinction is critical for understanding where NVIDIA's position is strong versus where it's vulnerable.

Training requires massive parallelism, high-precision arithmetic (BF16/FP32), enormous memory bandwidth (for moving model parameters during backward passes), and fast inter-GPU interconnects for distributed training across thousands of GPUs. NVIDIA's NVLink and NVSwitch interconnect fabric is a genuine competitive advantage here. Competing solutions require rethinking cluster topology from the ground up.

Inference is a different workload: fixed weights, lower-precision arithmetic (INT8, FP8, INT4), latency sensitivity rather than throughput maximization, and often smaller model sizes for edge deployments. This workload profile is far more amenable to purpose-built silicon. Groq's LPU (Language Processing Unit) is built around deterministic, on-chip memory to chase token-generation latency that GPUs struggle to match. Cerebras's wafer-scale engine attacks the memory bandwidth bottleneck for large models. Neither is competing with NVIDIA for training clusters. They're building the inference infrastructure layer for production AI deployment, and that's the bigger long-run market.

CHIPS Act and Domestic Fab Economics

The CHIPS and Science Act allocated $52.7B for semiconductor manufacturing and research in the US, with $39B in direct fabrication subsidies. Watch what actually landed, though, because the headline numbers and the finalized ones diverged. Intel's preliminary $8.5B became a finalized $7.86B award in November 2024. Samsung's proposed $6.4B was cut to $4.745B after Commerce's due diligence. TSMC's Arizona operations got $6.6B. The policy rationale is strategic (reducing supply chain vulnerability), but the economics are challenging.

Then the program mutated. In August 2025 the Trump administration converted Intel's remaining CHIPS money, plus Secure Enclave funds, into equity: an $8.9B stock purchase at $20.47 a share that handed the US government roughly a 10% stake in Intel. Whatever you think of the policy, it changes the analytical frame. CHIPS money is no longer reliably a non-dilutive grant. For anyone underwriting a domestic fab thesis, subsidy now carries a possible equity string.

US chip manufacturing costs run 30-50% higher than Taiwan or Korea operations due to labor costs, permitting timelines, and less mature supplier ecosystems. Government subsidies offset these premiums, but only partially. The realistic outcome: the US develops leading-edge manufacturing capability for strategic supply assurance rather than cost-competitive commercial production. For investors, CHIPS Act beneficiaries gain protected cash flows for domestic government and defense contracts. Commercial margins remain under pressure.

Valuation Framework: Cycling Through the Cycle

Semiconductors are still cyclical. I want to be direct about this: the AI narrative has not changed the fundamental cyclicality of the industry. Demand cycles, supply ramps, overshoots, and corrections are baked into the structure of the business. Standard P/E ratios are nearly useless at cycle peaks and troughs. The professional approach is to value on normalized earnings, meaning what the business earns on average across a full semiconductor cycle, rather than current-period earnings.

For pure-play equipment companies (ASML, Applied Materials, Lam Research), EV/Sales on mid-cycle revenue is the most stable metric because capital equipment demand is a leading indicator. These companies typically trade at 6-12x mid-cycle sales. Below 6x has historically been a strong entry point.

For fabless AI chip companies in the current cycle, the relevant question is whether AI compute demand sustains the capex super-cycle long enough to justify current valuations. Microsoft, Google, Amazon, and Meta are tracking toward roughly $700B of combined 2026 capex, up sharply from around $400B in 2025, and a large share of that is AI infrastructure. The capital is committed. The risk isn't that they cancel this year's spend. It's the year after: whether AI revenue grows fast enough to justify doing it again, or whether the cycle rolls over once capacity catches up. That is the single question that decides the multiple on every AI-levered chip name. For the engineering view of where that capex actually goes (training vs inference, networking, model serving), see our AI infrastructure roadmap.

The automotive and IoT semiconductor tailwinds are real and underappreciated relative to the AI narrative. An electric vehicle carries roughly double the semiconductor content of a comparable internal combustion car, driven by power electronics, battery management, and the sensor stack. ADAS systems, software-defined vehicle architectures, and charging infrastructure are secular demand drivers that are uncorrelated with AI training budgets. NXP Semiconductors, Infineon, and ON Semiconductor offer semiconductor exposure with more predictable demand curves and less AI-cycle concentration risk.