Meta's Iris Chip Isn't an Nvidia Killer. It's a Cost Cut.

On July 9, Reuters got hold of an internal Meta memo saying the company will start manufacturing its own AI chip, code-named Iris, in September. Broadcom is the design partner. TSMC does the fabrication. The chip cleared its bug-testing phase in roughly six weeks with no significant problems, which is the kind of detail engineers put in a memo when they are quietly proud of themselves.^[1]Iris is one of four chip generations under Meta's MTIA program (Meta Training and Inference Accelerator, the in-house silicon line that runs ranking and recommendation workloads across Facebook and Instagram).^[1]

The headlines wrote themselves. Meta breaks free from Nvidia. Meta builds its own brain. Nvidia's moat is cracking.

It isn't, and the memo basically says so. Meta is guiding to somewhere between $125 billion and $145 billion of capital expenditure (capex, the money a company spends on physical infrastructure like buildings, servers, and chips) this year, roughly double the $72.2 billion it spent in 2025.^[2] You do not double your GPU (graphics processing unit, the general-purpose chip class that trains and serves most large models) budget and simultaneously exit your GPU supplier. What you do is build a purpose-built chip that eats the boring, high-volume, predictable half of your workload, so that the expensive general-purpose fleet you keep buying from Nvidia goes further per dollar. That is not a divorce. That is a hedge with a headcount.

What an in-house inference chip actually buys you

Start with what it does not buy you: raw performance. Nobody at Meta thinks Iris beats a Blackwell part on peak throughput across arbitrary workloads. That is not the pitch, and if you read the MTIA roadmap carefully, Meta never claims it is.

Here is what it does buy you, in order of how much it actually matters.

Cost per token on workloads you already know cold. Meta serves an absurd volume of ranking and recommendation inference. Which Reel do you see next. Which ad clears. Those models have predictable shapes: embedding lookups, sparse features, matrix multiplies with known dimensions. When the workload is that stable, an ASIC (application specific integrated circuit, a chip designed to do one class of thing instead of anything) can be tuned around it and win on cost per inference by a wide margin. You strip out the graphics heritage, the general-purpose scheduling, the precision modes you never use, and spend every square millimeter of die on the thing you actually run. Nvidia posts roughly 75% gross margins.^[3] A meaningful chunk of the savings is simply not paying that.

Supply security. This is the underrated one. Meta needs 14 gigawatts of compute online by 2027, up from 7 gigawatts in 2026.^[1] The binding constraint on that is not money, it is allocation. When you are the third-largest customer in a queue you do not control, having a second silicon line, even a slower one, is worth real money. The same memo shows Meta locking in long-term supply for Samsung memory, Sandisk flash, and Sumitomo fiber optics.^[1] Iris belongs in that column. It is a supply-chain instrument as much as a compute one.

Negotiating leverage. A credible in-house alternative changes what you pay for the thing you keep buying. This is the oldest trick in procurement and it works on Nvidia the same way it worked on Intel.

The MTIA roadmap is an inference roadmap

In March, Meta laid out four MTIA chips: 300, 400, 450, and 500.^[4] MTIA 300 is already in production for ranking and recommendation training. 400 was in lab testing. 450 and 500 are aimed at AI inference and slated for mass deployment in early and late 2027 respectively.^[5] Across that span, HBM bandwidth (high bandwidth memory, the stacked DRAM sitting next to the compute die that usually decides how fast you can actually serve a model) rises about 4.5x and compute throughput rises roughly 25x.^[5]

The cadence is the flex. Meta says it can ship a new chip roughly every six months, against an industry norm of one to two years.^[4] That is only possible because Meta is not designing a product, it is designing an appliance for a workload it owns end to end. No customer support. No third-party software compatibility matrix. No sales engineers explaining why your kernel is slow.

Notice what is missing from all of it. There is no MTIA that trains a frontier model. Meta will train Llama and whatever Superintelligence Labs is cooking on Nvidia and AMD, because frontier training is where the workload changes every few months and where a chip that was taped out eighteen months ago is a liability. Meta's own framing is that the chips augment, rather than replace, the GPUs it keeps buying.^[1]

Why in-house chips almost never fully replace Nvidia

The honest answer is that the silicon was never the hard part. The software is.

Nvidia's real moat is CUDA (Compute Unified Device Architecture, the programming model and library stack that lets you actually run things on Nvidia hardware). Fifteen years of kernels, libraries, profilers, and Stack Overflow answers sit on top of it. Every ML engineer you might hire already knows it. Every optimization anyone has published assumes it.

The scale of the compatibility problem is easy to underrate. PyTorch, the framework nearly all of this runs on, exposes more than 2,000 operators. Writing a performant backend that fully supports them has been genuinely hard for every machine-learning ASIC that is not an Nvidia GPU.^[6] PyTorch 2.x helped by compiling down to a much smaller set of primitives and making Triton (a Python-level kernel language) the default kernel layer, which is exactly the wedge that makes non-Nvidia backends viable.^[6]But viable is not equal. PyTorch's own engineers benchmarked Triton-generated kernels at roughly 0.76 to 0.78 times CUDA performance on an H100.^[7]

Sit with that for a second. That is the reference implementation of the escape hatch, running on Nvidia's own silicon, and it still gives up 20-something percent. Now port it to a chip that was designed by a different company and taped out at TSMC last year, and staff the team that has to keep it fast through three PyTorch releases a year. That is the tax nobody puts in the press release.

Broadcom is the actual winner here

Look at who gets paid in every one of these stories. Google's TPU is co-developed with Broadcom. Meta's MTIA is co-developed with Broadcom. OpenAI's custom chip is with Broadcom.

In April, Broadcom and Meta extended their partnership through 2029, with an initial commitment exceeding one gigawatt of MTIA silicon and a roadmap to multi-gigawatt scale, built on Broadcom's XPU platform and its Ethernet networking, and including what the companies called the industry's first 2nm AI compute accelerator.^[8,9] The numbers underneath that are not subtle. Broadcom reported $8.4 billion of AI semiconductor revenue in fiscal Q1 2026, up 106% year over year,^[10] then $10.8 billion in Q2, up 143%, with guidance of $16 billion for Q3.^[11]

The way I think about it: every hyperscaler that decides to build its own chip is a hyperscaler that decides to pay Broadcom to build it. Broadcom does not carry model risk, does not carry a CUDA-sized software obligation, and does not need any one of these programs to win. It just needs the anxiety about Nvidia to persist. That is a remarkably durable business to be in.

What this actually does to Nvidia

Nvidia just did $81.6 billion of revenue in a single quarter, $75.2 billion of it data center, up 92% year over year, at 74.9% GAAP gross margin.^[3]Every custom-silicon program on earth is running at full tilt and Nvidia's data center business nearly doubled anyway. Any thesis that says ASICs are eating Nvidia has to explain that number first.

The honest read is more boring and more interesting. Custom silicon is not taking Nvidia's revenue. It is taking Nvidia's share of the incremental workload that becomes predictable. AI workloads calcify over time. A model architecture that was exotic in 2024 is a stable serving pattern in 2026, and the moment it stabilizes, it becomes ASIC-shaped. So the question is not whether Nvidia loses. It is whether the frontier keeps moving fast enough to keep generating new unpredictable workload faster than the old workload calcifies.

That is the actual Nvidia bull case, and it has nothing to do with transistors. If AI research plateaus and everyone spends the next five years serving roughly the same model shapes, Nvidia's margin compresses toward whatever Broadcom charges plus TSMC plus a spread. If research keeps moving, general-purpose compute keeps winning, because nobody tapes out silicon for an architecture that might not exist when the wafer comes back.

What I'd watch

Three things would tell me the story is bigger than a cost cut.

• An MTIA part used for frontier training. Not ranking, not recommendation, not inference. Training. That would mean Meta believes it can chase a moving architecture in silicon, which nobody outside Google has credibly done.
• Meta open-sourcing the MTIA software stack.Meta gave away PyTorch and it reshaped the industry. If it gives away a production-grade non-CUDA backend that other people's chips can target, that is a direct attack on the moat, and it costs Meta almost nothing to run the play a second time.
• Nvidia's gross margin. Not its revenue, its margin. Revenue can keep climbing on volume while pricing power quietly erodes. Margin is where the ASIC pressure shows up first, and 75% is a long way to fall.

Absent those, Iris is what it looks like. A very good, very specific chip that will make Meta's recommendation infrastructure meaningfully cheaper to run, built by Broadcom, fabbed by TSMC, deployed alongside a GPU order that keeps getting larger. Meta is not leaving Nvidia. Meta is making sure that when it walks into the room to negotiate its next GPU order, it has something on the table.

That is worth billions. It is just not a revolution.